/Advanced PDK workshop: N2 and A14 nanosheet pathfinding and applications

Advanced PDK workshop: N2 and A14 nanosheet pathfinding and applications

March 25 - 26, 2026 | imec, Leuven, Belgium

Join us for an in-depth workshop on advanced CMOS technology nodes (N2 and A14), co-organized by Europractice and the NanoIC pilot line.  

Training information

This intensive 2-day workshop is designed to provide participants with a deep dive into the world of N2 and A14 Nanosheets Pathfinding-PDK (P-PDK), including a comprehensive understanding of Back-Side Power Distribution Network (PDN). The course will cover theoretical foundations of the N2 and A14 technologies, practical design strategies, and implementation in digital design flow.

Programme

In Day 1, participants will engage with expert-led seminars that outline the core principles of Nanosheet technology and its impact on advancing semiconductor design. 
In Day 2, hands-on sessions allow attendees to apply P-PDK principles using industry-standard tools . This 2-day course will exclusively focus on digital flow and will not cover custom design.

Day 1: Introduction to N2 Node and Open PDK

  • Introduction to EUROPRACTICE platform, imec IC-Link
  • Open PDK Access: Learning about the significance of P-PDKs and how they facilitate academic and industry collaboration.
  • N2-A14 Technology Node: Explore the latest advancements in semiconductor technology with a focus on N2-A14 nodes process.
  • Introduction to Nanosheet Technology: Dive into the fundamentals of nanosheet devices and their position in the scaling roadmap.
    • Process Integration: Understanding the basic FEOL and BEOL integration principles assumed in N2-A14 P-PDK.
    • Standard cell and SRAM design in N2-A14 technology: Understanding the layout of the standard cells and SRAM.
    • Interconnect stack: learning about BEOL patterning and RC assumptions in N2-A14 P-PDK.
    • Back-side PDN: Learning about the innovative approach to power distribution through the Backside of semiconductor structures.
  • Overview of P-PDK: Description of the content of the P-PDK and the design flow.
  • Q&A with Experts

Day 2: Hands-On EDA Tool Application

  • Designing with P-PDK: Hands-on sessions on how to utilize P-PDK in digital flow using both Cadence and Synopsys Electronic
  • Design Automation (EDA) tools. The hands-on approach on the second day will provide participants with the opportunity to apply their EDA tool experience in practical scenarios.
  • Q&A with Experts

Who should attend? 

These lectures are suitable for students, academics, and professionals with an interest in semiconductor technology. However for the practical sessions participants should have a good understanding of standard digital design.

Dates 

March 25, 9 am - 4 pm (seminars)
March 26, 9 am - 4 pm (hands-on workshop)

Venue 

Imec 1, Kapeldreef 75, Leuven, Belgium

Registration

The registration fee for this event is €150. 
Registration will close on 15 March 2026, or earlier if all available places are filled,
It is also possible to attend just the first day.

Register now